Renesas M16C 用户手册

Rev.1.10    Jul 01, 2005    page 174 of 318
REJ09B0124-0110

M16C/6N Group (M16C/6NK, M16C/6NM)

14. Serial I/O

This document is under development and its contents are subject to change.

When direct format, set the PRY bit in the U2MR register to “1”, the UFORM bit in the U2C0 register to

“0” and the U2LCH bit in the U2C1 register to “0”.

When inverse format, set the PRY bit to “0”, UFORM bit to “1” and U2LCH bit to “1”.

Figure 14.35 shows the SIM interface format.

P : Even parity

D0

D1

D2

D3

D4

D5

D6

D7

P

Transfer 

clock

TXD2

TXD2

D7

D6

D5

D4

D3

D2

D1

D0

P

Transfer 

clock

"H"

"L"

"H"

"L"

P : Odd parity

"H"

"L"

"H"

"L"

(1) Direct format

(2) Inverse format