Motorola MC68340 用户手册
MOTOROLA
MC68340 USER’S MANUAL
6- 29
DSIZE—Destination Size Control Field
This field controls the size of the destination (write) bus cycle that the DMA channel is
running. Table 6-3 defines these bits.
running. Table 6-3 defines these bits.
Table 6-3. DSIZEx Encoding
Bit 7
Bit 6
Definition
0
0
Long Word*
0
1
Byte
1
0
Word
1
1
Not Used
*External logic is required to complete a long-
word transfer.
REQ—Request Generation Field
This field controls the mode of operation the DMA channel uses to make an operand
transfer request. Table 6-4 defines these bits.
transfer request. Table 6-4 defines these bits.
Table 6-4. REQx Encoding
Bit 5
Bit 4
Definition
0
0
Internal Request at Programmable Rate
0
1
Reserved
1
0
External Request Burst Transfer Mode
1
1
External Request Cycle Steal
BB—Bus Bandwidth Field
This field controls the percentage of 1024 clock periods of the IMB that the DMA
channel can use during internal requests only. Table 6-5 defines these bits.
channel can use during internal requests only. Table 6-5 defines these bits.
Table 6-5. BBx Encoding and Bus Bandwidth
REQ Field
BB Field
Bus Bandwidth
Bit 5
Bit 4
Bit 3
Bit 2
Definition
(Clock Periods)
0
0
0
0
25%
256
0
0
0
1
50%
512
0
0
1
0
75%
768
0
0
1
1
100%
1024
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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