Nxp Semiconductors PCA2125 用户手册

 

 

UM10301_1 

© NXP B.V. 2008. All rights reserved.

The implementation in the PCF2123 is slightly different. There a bit OS (Oscillator 
Stopped) is present instead of VL. The OS flag is set whenever the oscillator is stopped, 
and therefore also when this is due to the supply voltage dropping too low. The flag can 
only be cleared by software and only if the oscillator is running again. 

 

VL set

normal power
operation

period of battery
operation

t

V

DD

V

low

 

<OS>

Battery operation

Main supply

t

V

DD

V

OSC(MIN)

 

(1)  Valid for PCF8563 and PCA8565 

(2)  Valid for PCF2123 

 

In the case of PCF8563/PCA8565 bit VL set indicates that the integrity of the clock 
information is no longer guaranteed. If the oscillator hasn’t stopped, the clock information 
will still be ok, but with V

DD

 having dropped below V

low

 there is no guarantee that this still 

is the case because there is no way to be sure that the oscillator kept running. The VL 
flag can only be cleared by software. 

Both VL and OS are intended to detect the situation when V

DD

 is decreasing slowly, for 

example under battery operation. Should V

DD

 reach the limit where the flag is set before 

power is re-asserted, then the flag VL or OS will indicate that time may be (VL) or is (OS) 
corrupted. V

DD

 dropping below V

low

 or V

osc(min)

  in itself does not cause any register to be 

reset. Once the oscillator stops some registers will be reset. 
 

 

A crystal oscillator as used in a real-time clock, see Fig 4, is built on the principle of 
Pierce and uses an inverting amplifier with a crystal in the feedback path and load 
capacitors C

IN

 and C

OUT

 to provide the necessary additional phase shift. Some phase 

shift is contributed as a result of the amplifier’s non-zero output impedance in 
combination with C

OUT

. The oscillator operates at the frequency for which the crystal is 

anti-resonant (i.e. parallel resonant) with the total capacitive load of the oscillating circuit 
as seen from the pins of the crystal. This total capacitance is called the load capacitance. 

The load capacitance is defined as the capacitance seen from the pins of the crystal and 
is formed by C

IN

, C

OUT

 and C

STRAY

 indicated in Fig 4. Electrically the crystal’s C

0

 is also a 

load capacitance which affects oscillator characteristics. However, it is not part of the 
defined ‘load capacitance’. During manufacturing the crystal is tuned to the specified 
frequency with a specified load capacitance connected to the crystal. Since C

0

 is part of 

the crystal, it is automatically taken into account during the adjustment procedure.