Nxp Semiconductors UM10237 用户手册
UM10237_2
© NXP B.V. 2008. All rights reserved.
User manual
Rev. 02 — 19 December 2008
109 of 792
NXP Semiconductors
UM10237
Chapter 7: LPC24XX Vectored Interrupt Controller (VIC)
Table 102. Summary of VIC registers
Name
Description
Access
Reset
value
value
Address
VICIRQStatus
IRQ Status Register. This register reads out the state of those
interrupt requests that are enabled and classified as IRQ.
interrupt requests that are enabled and classified as IRQ.
RO
0
0xFFFF F000
VICFIQStatus
FIQ Status Requests. This register reads out the state of those
interrupt requests that are enabled and classified as FIQ.
interrupt requests that are enabled and classified as FIQ.
RO
0
0xFFFF F004
VICRawIntr
Raw Interrupt Status Register. This register reads out the state of
the 32 interrupt requests / software interrupts, regardless of
enabling or classification.
the 32 interrupt requests / software interrupts, regardless of
enabling or classification.
RO
-
0xFFFF F008
VICIntSelect
Interrupt Select Register. This register classifies each of the 32
interrupt requests as contributing to FIQ or IRQ.
interrupt requests as contributing to FIQ or IRQ.
R/W
0
0xFFFF F00C
VICIntEnable
Interrupt Enable Register. This register controls which of the 32
interrupt requests and software interrupts are enabled to
contribute to FIQ or IRQ.
interrupt requests and software interrupts are enabled to
contribute to FIQ or IRQ.
R/W
0
0xFFFF F010
VICIntEnClr
Interrupt Enable Clear Register. This register allows software to
clear one or more bits in the Interrupt Enable register.
clear one or more bits in the Interrupt Enable register.
WO
-
0xFFFF F014
VICSoftInt
Software Interrupt Register. The contents of this register are
ORed with the 32 interrupt requests from various peripheral
functions.
ORed with the 32 interrupt requests from various peripheral
functions.
R/W
0
0xFFFF F018
VICSoftIntClear
Software Interrupt Clear Register. This register allows software
to clear one or more bits in the Software Interrupt register.
to clear one or more bits in the Software Interrupt register.
WO
-
0xFFFF F01C
VICProtection
Protection enable register. This register allows limiting access to
the VIC registers by software running in privileged mode.
the VIC registers by software running in privileged mode.
R/W
0
0xFFFF F020
VICSWPriorityMask Software Priority Mask Register. Allows masking individual
interrupt priority levels in any combination.
R/W
0xFFFF 0xFFFF F024
VICVectAddr0
Vector address 0 register. Vector Address Registers 0-31 hold
the addresses of the Interrupt Service routines (ISRs) for the 32
vectored IRQ slots.
the addresses of the Interrupt Service routines (ISRs) for the 32
vectored IRQ slots.
R/W
0
0xFFFF F100
VICVectAddr1
Vector address 1 register.
R/W
0
0xFFFF F104
VICVectAddr2
Vector address 2 register.
R/W
0
0xFFFF F108
VICVectAddr3
Vector address 3 register.
R/W
0
0xFFFF F10C
VICVectAddr4
Vector address 4 register.
R/W
0
0xFFFF F110
VICVectAddr5
Vector address 5 register.
R/W
0
0xFFFF F114
VICVectAddr6
Vector address 6 register.
R/W
0
0xFFFF F118
VICVectAddr7
Vector address 7 register.
R/W
0
0xFFFF F11C
VICVectAddr8
Vector address 8 register.
R/W
0
0xFFFF F120
VICVectAddr9
Vector address 9 register.
R/W
0
0xFFFF F124
VICVectAddr10
Vector address 10 register.
R/W
0
0xFFFF F128
VICVectAddr11
Vector address 11 register.
R/W
0
0xFFFF F12C
VICVectAddr12
Vector address 12 register.
R/W
0
0xFFFF F130
VICVectAddr13
Vector address 13 register.
R/W
0
0xFFFF F134
VICVectAddr14
Vector address 14 register.
R/W
0
0xFFFF F138
VICVectAddr15
Vector address 15 register.
R/W
0
0xFFFF F13C
VICVectAddr16
Vector address 16 register.
R/W
0
0xFFFF F140
VICVectAddr17
Vector address 17 register.
R/W
0
0xFFFF F144
VICVectAddr18
Vector address 18 register.
R/W
0
0xFFFF F148