Nxp Semiconductors UM10237 用户手册

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页码 792
UM10237_2
© NXP B.V. 2008. All rights reserved.
User manual
Rev. 02 — 19 December 2008 
173 of 792
NXP Semiconductors
UM10237
Chapter 8: LPC24XX Pin configuration
TMS
I
TMS — Test Mode Select for JTAG interface.
TRST
I
TRST — Test Reset for JTAG interface.
TCK
10
I
TCK — Test Clock for JTAG interface. This clock must be slower than 
1
6
 
of the CPU clock (CCLK) for the JTAG interface to operate.
RTCK
I/O
RTCK — JTAG interface control signal.
Note: LOW on this pin while RESET is LOW enables ETM pins (P2[9:0]) 
to operate as Trace port after reset.
RSTOUT
29
K3
O
RSTOUT — This is a 3.3 V pin. LOW on this pin indicates UM10237 
being in Reset state.
RESET
M2
I
external reset input: A LOW on this pin resets the device, causing I/O 
ports and peripherals to take on their default states, and processor 
execution to begin at address 0. TTL with hysteresis, 5 V tolerant.
XTAL1
44
M4
I
Input to the oscillator circuit and internal clock generator circuits.
XTAL2
46
O
Output from the oscillator amplifier.
RTCX1
34
I
Input to the RTC oscillator circuit.
RTCX2
36
L2
O
Output from the RTC oscillator circuit.
V
SSIO
33, 63, 
77, 93, 
114, 
133, 
148, 
169, 
189, 
200
L3, T5, 
R9, P12, 
N16, 
H14,
E15, 
A12, B6, 
A2
I
ground: 0 V reference for the digital IO pins.
V
SSCORE
32, 84, 
172
K4, P10, 
D12
I
ground: 0 V reference for the core.
V
SSA
J2
I
analog ground: 0 V reference. This should nominally be the same 
voltage as V
SSIO
/V
SSCORE
, but should be isolated to minimize noise and 
error.
V
DD(3V3)
15, 60, 
71, 89, 
112, 
125, 
146, 
165, 
181, 
198
G3, P6, 
P8, U13, 
P17, 
K16,
C17, 
B13, C9, 
D7
I
3.3 V supply voltage: This is the power supply voltage for the I/O ports.
n.c.
30, 117, 
141
 J4, L14, 
G14
I
not connected pins: These pins must be left unconnected (floating).
V
DD(DCDC)(3V3)
26, 86, 
174
H4, P11, 
D11
I
3.3 V DC-to-DC converter supply voltage: This is the power supply for 
the on-chip DC-to-DC converter.
V
DDA
G4
I
analog 3.3 V pad supply voltage: This should be nominally the same 
voltage as V
DD(3V3)
 but should be isolated to minimize noise and error. 
This voltage is used to power the ADC and DAC.
VREF
I
ADC reference: This should be nominally the same voltage as V
DD(3V3)
 
but should be isolated to minimize noise and error. The level on this pin is 
used as a reference for ADC and DAC.
VBAT
38
M3
I
RTC power supply: 3.3 V on this pin supplies the power to the RTC 
peripheral.
Table 124. LPC2470/78 pin description
 …continued
Symbol
Pin
Ball
Type
Description