Nxp Semiconductors UM10237 用户手册
UM10237_2
© NXP B.V. 2008. All rights reserved.
User manual
Rev. 02 — 19 December 2008
218 of 792
NXP Semiconductors
UM10237
Chapter 11: LPC24XX Ethernet
Table 186. Summary of Ethernet registers
Symbol
Address
R/W Description
MAC registers
MAC1
0xFFE0 0000
R/W MAC configuration register 1.
MAC2
0xFFE0 0004
R/W MAC configuration register 2.
IPGT
0xFFE0 0008
R/W Back-to-Back Inter-Packet-Gap register.
IPGR
0xFFE0 000C
R/W Non Back-to-Back Inter-Packet-Gap register.
CLRT
0xFFE0 0010
R/W Collision window / Retry register.
MAXF
0xFFE0 0014
R/W Maximum Frame register.
SUPP
0xFFE0 0018
R/W PHY Support register.
TEST
0xFFE0 001C
R/W Test register.
MCFG
0xFFE0 0020
R/W MII Mgmt Configuration register.
MCMD
0xFFE0 0024
R/W MII Mgmt Command register.
MADR
0xFFE0 0028
R/W MII Mgmt Address register.
MWTD
0xFFE0 002C
WO
MII Mgmt Write Data register.
MRDD
0xFFE0 0030
RO
MII Mgmt Read Data register.
MIND
0xFFE0 0034
RO
MII Mgmt Indicators register.
-
0xFFE0 0038 to
0xFFE0 003F
0xFFE0 003F
-
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit
is not defined.
reserved bits. The value read from a reserved bit
is not defined.
SA0
0xFFE0 0040
R/W Station Address 0 register.
SA1
0xFFE0 0044
R/W Station Address 1 register.
SA2
0xFFE0 0048
R/W Station Address 2 register.
-
0xFFE0 004C to
0xFFE0 00FC
0xFFE0 00FC
-
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit
is not defined.
reserved bits. The value read from a reserved bit
is not defined.
Control registers
Command
0xFFE0 0100
R/W Command register.
Status
0xFFE0 0104
RO
Status register.
RxDescriptor
0xFFE0 0108
R/W Receive descriptor base address register.
RxStatus
0xFFE0 010C
R/W Receive status base address register.
RxDescriptorNumber
0xFFE0 0110
R/W Receive number of descriptors register.
RxProduceIndex
0xFFE0 0114
RO
Receive produce index register.
RxConsumeIndex
0xFFE0 0118
R/W Receive consume index register.
TxDescriptor
0xFFE0 011C
R/W Transmit descriptor base address register.
TxStatus
0xFFE0 0120
R/W Transmit status base address register.
TxDescriptorNumber
0xFFE0 0124
R/W Transmit number of descriptors register.
TxProduceIndex
0xFFE0 0128
R/W Transmit produce index register.
TxConsumeIndex
0xFFE0 012C
RO
Transmit consume index register.
-
0xFFE0 0130 to
0xFFE0 0154
0xFFE0 0154
-
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit
is not defined.
reserved bits. The value read from a reserved bit
is not defined.
TSV0
0xFFE0 0158
RO
Transmit status vector 0 register.
TSV1
0xFFE0 015C
RO
Transmit status vector 1 register.