Nxp Semiconductors UM10237 用户手册

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UM10237_2
© NXP B.V. 2008. All rights reserved.
User manual
Rev. 02 — 19 December 2008 
23 of 792
NXP Semiconductors
UM10237
Chapter 2: LPC24XX Memory mapping
5.
LPC2400 memory re-mapping and boot ROM
5.1 Memory map concepts and operating modes
The basic concept on the LPC2400 is that each memory area has a "natural" location in 
the memory map. This is the address range for which code residing in that area is written. 
The bulk of each memory space remains permanently fixed in the same location, 
eliminating the need to have portions of the code designed to run in different address 
ranges.
Because of the location of the interrupt vectors on the ARM7 processor (at addresses 
0x0000 0000 through 0x0000 001C, as shown in 
 below), a small portion of the 
Boot ROM and SRAM spaces need to be re-mapped in order to allow alternative uses of 
interrupts in the different operating modes described in 
Re-mapping of the 
interrupts is accomplished via the Memory Mapping Control feature (
 
Table 18.
ARM exception vector locations
Address
Exception
0x0000 0000
Reset
0x0000 0004
Undefined Instruction
0x0000 0008
Software Interrupt
0x0000 000C
Prefetch Abort (instruction fetch memory fault)
0x0000 0010
Data Abort (data access memory fault)
0x0000 0014
Reserved
Note: Identified as reserved in ARM documentation, this location is used 
by the Boot Loader as the Valid User Program key when booting from 
on-chip flash memory. This is described in detail in 
.
0x0000 0018
IRQ
0x0000 001C
FIQ