Nxp Semiconductors UM10237 用户手册
UM10237_2
© NXP B.V. 2008. All rights reserved.
User manual
Rev. 02 — 19 December 2008
566 of 792
NXP Semiconductors
UM10237
Chapter 21: LPC24XX SD/MMC card interface
Note: After a data write, data cannot be written to this register for three MCLK clock
periods plus two PCLK clock periods.
periods plus two PCLK clock periods.
6.5 Command Response Register (MCIRespCommand - 0xE008 C010)
The MCIRespCommand register contains the command index field of the last command
response received.
response received.
shows the bit assignment of the MCIRespCommand
register.
If the command response transmission does not contain the command index field (long
response), the RespCmd field is unknown, although it must contain 111111 (the value of
the reserved field from the response).
response), the RespCmd field is unknown, although it must contain 111111 (the value of
the reserved field from the response).
6.6 Response Registers (MCIResponse0-3 - 0xE008 C014, E008 C018,
E008 C01C and E008 C020)
The MCIResponse0-3 registers contain the status of a card, which is part of the received
response.
response.
shows the bit assignment of the MCIResponse0-3 registers.
Table 494: Command register (MCICommand - address 0xE008 C00C) bit description
Bit
Symbol
Description
Reset
Value
Value
5:0
CmdIndex Command index.
0
6
Response
If set, CPSM waits for a response.
0
7
LongRsp
If set, CPSM receives a 136 bit long response.
0
8
Interrupt
If set, CPSM disables command timer and waits for interrupt request. 0
9
Pending
If set, CPSM waits for CmdPend before it starts sending a command. 0
10
Enable
If set, CPSM is enabled.
0
31:11
-
Reserved, user software should not write ones to reserved bits. The
value read from a reserved bit is not defined.
value read from a reserved bit is not defined.
NA
Table 495: Command Response Types
Response
Long Response
Description
0
0
No response, expect CmdSent flag.
0
1
No response, expect CmdSent flag.
1
0
Short response, expect CmdRespEnd or CmdCrcFail flag.
1
1
Long response, expect CmdRespEnd or CmdCrcFail flag.
Table 496: Command Response register (MCIRespCommand - address 0xE008 C010) bit
description
Bit
Symbol
Description
Reset
Value
Value
5:0
RespCmd
Response command index
0x00
31:6
-
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
The value read from a reserved bit is not defined.
NA