Nxp Semiconductors UM10237 用户手册

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页码 792
UM10237_2
© NXP B.V. 2008. All rights reserved.
User manual
Rev. 02 — 19 December 2008 
642 of 792
NXP Semiconductors
UM10237
Chapter 25: LPC24XX Pulse Width Modulator PWM0/PWM1
3
PWMMR1I
1
Interrupt on PWMMR1: an interrupt is generated when 
PWMMR1 matches the value in the PWMTC.
0
0
This interrupt is disabled.
4
PWMMR1R 1
Reset on PWMMR1: the PWMTC will be reset if PWMMR1 
matches it.
0
0
This feature is disabled.
5
PWMMR1S 1
Stop on PWMMR1: the PWMTC and PWMPC will be stopped 
and PWMTCR bit 0 will be set to 0 if PWMMR1 matches the 
PWMTC.
0
0
This feature is disabled.
6
PWMMR2I
1
Interrupt on PWMMR2: an interrupt is generated when 
PWMMR2 matches the value in the PWMTC.
0
0
This interrupt is disabled.
7
PWMMR2R 1
Reset on PWMMR2: the PWxMTC will be reset if PWMMR2 
matches it.
0
0
This feature is disabled.
8
PWMMR2S 1
Stop on PWMMR2: the PWMTC and PWMPC will be stopped 
and PWMTCR bit 0 will be set to 0 if PWMMR2 matches the 
PWxMTC.
0
0
This feature is disabled
9
PWMMR3I
1
Interrupt on PWMMR3: an interrupt is generated when 
PWMMR3 matches the value in the PWMTC.
0
0
This interrupt is disabled.
10
PWMMR3R 1
Reset on PWMMR3: the PWMTC will be reset if PWMMR3 
matches it.
0
0
This feature is disabled
11
PWMMR3S 1
Stop on PWMMR3: The PWMTC and PWMPC will be 
stopped and PWMTCR bit 0 will be set to 0 if PWMMR3 
matches the PWMTC.
0
0
This feature is disabled
12
PWMMR4I
1
Interrupt on PWMMR4: An interrupt is generated when 
PWMMR4 matches the value in the PWMTC.
0
0
This interrupt is disabled.
13
PWMMR4R 1                  Reset  on  PWMMR4:  the  PWMTC  will  be  reset  if  PWMMR4 
matches it.
0
0
This feature is disabled.
14
PWMMR4S 1                  Stop on PWMMR4: the PWMTC and PWMPC will be stopped 
and PWMTCR[0] will be set to 0 if PWMMR4 matches the 
PWMTC.
0
0
This feature is disabled
15
PWMMR5I
1                  Interrupt  on  PWMMR5:  An  interrupt  is  generated  when 
PWMMR5 matches the value in the PWMTC.
0
0
This interrupt is disabled.
Table 561: Match Control Register (PWM0MCR - address 0xE000 4014 and PWM1MCR - 
address 0xE000 8014) bit description
Bit
Symbol
Value Description
Reset 
Value