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Section 2   CPU 
Rev. 4.00  Sep. 14, 2005  Page 88 of 982 
REJ09B0023-0400 
 
2.6.4 
DSP Operation Instruction Set 
DSP operation instructions are instructions for digital signal processing performed by the DSP 
unit. These instructions have a 32-bit instruction code, and multiple instructions can be executed 
in parallel. The instruction code is divided into an A field and B field; a parallel data transfer 
instruction is specified in the A field, and a single or double data operation instruction in the B 
field. Instructions can be specified independently, and are also executed independently. The 
parallel data transfer instruction specified in the A field is exactly the same as a double data 
transfer instruction. The function of the A field—that is, the data transfer instruction field—is 
basically the same as in the double data transfer instructions described in section 2.6.3, Single and 
Double Data Transfer for DSP Data Instructions, but has a special function in load instructions. 
B-field data operation instructions are of three kinds: double data operation instructions, 
conditional single data operation instructions, and unconditional single data operation instructions. 
The formats of the DSP operation instructions are shown in table 2.29. The respective operands 
are selected independently from the DSP registers. The correspondence between DSP operation 
instruction operands and registers is shown in table 2.30. 
Table 2.29  DSP Operation Instruction Formats 
Type Instruction 
Formats 
Double data operation instructions 
 
ALUop. Sx, Sy, Du  
 
MLTop. Se, Df, Dg 
Conditional single data operation instructions 
 
ALUop. Sx, Sy, Dz 
DCT 
ALUop. Sx, Sy, Dz 
DCF 
ALUop. Sx, Sy, Dz 
 
ALUop. Sx, Dz 
DCT 
ALUop. Sx, Dz 
DCF 
ALUop. Sx, Dz 
 
ALUop. Sy, Dz 
DCT 
ALUop. Sy, Dz 
DCF 
ALUop. Sy, Dz 
Unconditional single data operation instructions 
 
ALUop. Sx, Sy, Dz 
 
ALUop. Sx, Dz 
 
ALUop. Sy, Dz 
 
MLTop. Se, Sf, Dg