Renesas HD6417641 用户手册
Section 10 Interrupt Controller (INTC)
Rev. 4.00 Sep. 14, 2005 Page 223 of 982
REJ09B0023-0400
10.3.1 Interrupt
Priority Registers B to J (IPRB to IPRJ)
IPRB to IPRJ are 16-bit readable/writable registers in which priority levels from 0 to 15 are set for
on-chip peripheral module and IRQ interrupts. These registers are initialized to H'0000 by a
power-on reset or manual reset, but are not initialized in standby mode.
on-chip peripheral module and IRQ interrupts. These registers are initialized to H'0000 by a
power-on reset or manual reset, but are not initialized in standby mode.
Bit Bit
Name
Initial
Value R/W Description
Value R/W Description
15
14
13
12
IPR15
IPR14
IPR13
IPR12
0
0
0
0
R/W
R/W
R/W
R/W
These bits set the priority level for each interrupt
source in 4-bit units. For details, see table 10.2,
Interrupt Sources and IPRB to IPRJ.
source in 4-bit units. For details, see table 10.2,
Interrupt Sources and IPRB to IPRJ.
11
10
9
8
IPR11
IPR10
IPR9
IPR8
0
0
0
0
R/W
R/W
R/W
R/W
7
6
5
4
IPR7
IPR6
IPR5
IPR4
0
0
0
0
R/W
R/W
R/W
R/W
3
2
1
0
IPR3
IPR2
IPR1
IPR0
0
0
0
0
R/W
R/W
R/W
R/W