Renesas HD6417641 用户手册
Rev. 4.00 Sep. 14, 2005 Page xliii of l
Tables
Section 1 Overview
Table 1.1
Table 1.1
Features..................................................................................................................... 1
Table 1.2
Pin functions ............................................................................................................. 9
Table 1.3
Pin Functions .......................................................................................................... 18
Section 2 CPU
Table 2.1
Table 2.1
Initial Register Values............................................................................................. 28
Table 2.2
Destination Register in DSP Instructions................................................................ 37
Table 2.3
Source Register in DSP Operations ........................................................................ 38
Table 2.4
DSR Register Bits................................................................................................... 41
Table 2.5
Word Data Sign Extension...................................................................................... 45
Table 2.6
Delayed Branch Instructions................................................................................... 45
Table 2.7
T Bit........................................................................................................................ 46
Table 2.8
Immediate Data Referencing .................................................................................. 46
Table 2.9
Absolute Address Referencing................................................................................ 47
Table 2.10
Displacement Referencing ...................................................................................... 47
Table 2.11
Addressing Modes and Effective Addresses for CPU Instructions......................... 48
Table 2.12
Overview of Data Transfer Instructions.................................................................. 51
Table 2.13
CPU Instruction Formats ........................................................................................ 58
Table 2.14
Double Data Transfer Instruction Formats ............................................................. 62
Table 2.15
Single Data Transfer Instruction Formats ............................................................... 63
Table 2.16
A-Field Parallel Data Transfer Instructions ............................................................ 64
Table 2.17
B-Field ALU Operation Instructions and Multiply Instructions (1) ....................... 65
Table 2.17
B-Field ALU Operation Instructions and Multiply Instructions (2) ....................... 66
Table 2.18
CPU Instruction Types............................................................................................ 67
Table 2.19
Data Transfer Instructions....................................................................................... 71
Table 2.20
Arithmetic Operation Instructions .......................................................................... 73
Table 2.21
Logic Operation Instructions .................................................................................. 75
Table 2.22
Shift Instructions..................................................................................................... 76
Table 2.23
Branch Instructions ................................................................................................. 77
Table 2.24
System Control Instructions.................................................................................... 78
Table 2.25
Added CPU System Control Instructions ............................................................... 82
Table 2.26
Double Data Transfer Instructions.......................................................................... 85
Table 2.27
Single Data Transfer Instructions ........................................................................... 86
Table 2.28
Correspondence between DSP Data Transfer Operands and Registers .................. 87
Table 2.29
DSP Operation Instruction Formats........................................................................ 88
Table 2.30
Correspondence between DSP Instruction Operands and Registers ....................... 89