Renesas H8S/2111B 用户手册

Rev. 1.00, 05/04, page 206 of 544 

 

Figure 10.4 shows an example for outputting an arbitrary duty pulse. 

1.  Clear the CCLR1 bit in TCR to 0 so that TCNT is cleared according to the compare match of 

TCORA, and then set the CCLR0 bit to 1. 

2.  Set the OS3 to OS0 bits in TCSR to B'0110 so that 1 is output according to the compare match 

of TCORA and 0 is output according to the compare match of TCORB. 

 

According to the above settings, the waveforms with the TCORA cycle and TCORB pulse width 
can be output without the intervention of software. 

TCNT

H'FF

Counter clear

TCORA

TCORB

H'00

TMO