Renesas H8S/2111B 用户手册

下载
页码 582
Rev. 1.00, 05/04, page 307 of 544 
 
13.4 Operation 
The I
2
C bus interface has an I
2
C bus format and a serial format. 
13.4.1 I
2
C Bus Data Format 
The I
2
C bus format is an addressing format with an acknowledge bit. This is shown in figure 13.3. 
The first frame following a start condition always consists of 9 bits. 
The serial format is a non-addressing format with no acknowledge bit. This is shown in  
figure 13.4. 
Figure 13.5 shows the I
2
C bus timing. 
The symbols used in figures 13.3 to 13.5 are explained in table 13.6. 
S
A
SLA
7
n
R/
W
DATA
A
1
1
m
1
1
1
A/
A
1
P
1
Transfer bit count
(n = 1 to 8)
Transfer frame count
(m 
≥ 1)
S
SLA
7
n1
7
R/
W
A
DATA
1
1
1
m1
1
A/
A
1
S
1
SLA
R/
W
1
1
m2
A
1
DATA
n2
A/
A
1
P
1
(a) FS = 0 or FSX = 0
(b) Start condition retransmission FS = 0 or FSX = 0
Upper row: Transfer bit count (n1, n2 = 1 to 8)
Lower row: Transfer frame count (m1, m2 
≥ 1)
 
Figure 13.3   I
2
C Bus Data Format (I
2
C Bus Format) 
S
DATA
8
n
DATA
1
1
m
P
1
FS = 1 and FSX = 1
Transfer bit count
(n = 1 to 8)
Transfer frame count
(m 
≥ 1)
 
Figure 13.4   I
2
C Bus Data Format (Serial Format)