Renesas H8S/2111B 用户手册

Rev. 1.00, 05/04, page 43 of 544 

 

This mode can be used by the JMP and JSR instructions. The instruction code contains an 8-bit 
absolute address specifying a memory operand which contains a branch address. The upper bits of 
the 8-bit absolute address are all assumed to be 0, so the address range is 0 to 255 (H'0000 to 
H'00FF in normal mode, H'000000 to H'0000FF in advanced mode). 

In normal mode, the memory operand is a word operand and the branch address is 16 bits long. In 
advanced mode, the memory operand is a longword operand, the first byte of which is assumed to 
be 0 (H'00). Note that the top area of the address range in which the branch address is stored is 
also used for the exception vector area. For further details, refer to section 4, Exception Handling. 

If an odd address is specified in word or longword memory access, or as a branch address, the 
least significant bit is regarded as 0, causing data to be accessed or the instruction code to be 
fetched at the address preceding the specified address. (For further information, see section 2.5.2, 
Memory Data Formats.) 

Specified
by @aa:8

Specified
by @aa:8

Branch address

Branch address

Reserved

(a) Normal Mode

(b) Advanced Mode