Renesas H8S/2111B 用户手册

下载
页码 582
Rev. 1.00, 05/04, page 64 of 544 
 
4.6 
Stack Status after Exception Handling 
Figure 4.2 shows the stack after completion of trap instruction exception handling and interrupt 
exception handling. 
CCR
 CCR*
PC
(16 bits)
Note: Ignored on return.
Normal mode    
Advanced mode
CCR 
PC
(24 bits)
SP
SP
 
Figure 4.2   Stack Status after Exception Handling