Renesas SH7781 用户手册

24.   Multimedia Card Interface (MMCIF) 

Rev.1.00  Jan. 10, 2008  Page 1178 of 1658 
REJ09B0261-0100 

 

Bit:

 

Initial value:

R/W:

7

6

5

4

3

2

1

0

0

0

0

0

0

0

0

0

R

CRC

End

R

R

R

R

R

R

R

 

 

7 to 1 

CRC 

All 0 

R 

These bits are always read as 0. The write value should 
always be 0. 

0 

End 

0 

R 

This bit is always read as 0. The write value should 
always be 0. 

 

CMDSTRT is an 8-bit readable/writable register that triggers the start of command transmission, 
representing the start of a command sequence. The following operations should have been 
completed before the command sequence starts. 

•  Analysis of prior command response, clearing the command response register write if 

necessary 

•  Analysis/transfer of receive data of prior command if necessary 
•  Preparation of transmit data of the next command if necessary 
•  Setting of CMDTYR, RSPTYR, TBCR and TBNCR 
•  Setting of CMDR0 to CMDR4 

The CMDR0 to CMDR4, CMDTYR, RSPTYR, TBCR and TBNCR registers should not be 
changed until command transmission has ended (during the CWRE flag in CSTR has been set 
to 1 or until command transmit end interrupt has occurred). 

 

Command sequences are controlled by the sequencers in both the MMCIF side and the MMC card 
side. Normally, these operate synchronously. However, if an error occurs or a command is 
aborted, these may become temporarily unsynchronized. Be careful when setting the CMDOFF bit 
in OPCR, issuing the CMD12 command, or processing an error in MMC mode. A new command 
sequence should be started only after the end of the command sequence on both the MMCIF and 
card sides is confirmed. See section24.4, Operation when an error occurred.