Renesas SH7781 用户手册

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页码 1692
11.   Local Bus State Controller (LBSC) 
Rev.1.00  Jan. 10, 2008  Page 382 of 1658 
REJ09B0261-0100 
 
11.4.5
 
CSn PCMCIA Control Register (CSnPCR) 
CSnPCR is a 32-bit readable/writable register that specifies the timing for the PCMCIA interface 
connected to area n (CSnPCR, n = 5 or 6), the space property, and the assert/negate timing for the 
OE and WE signals. Also, areas 5 and 6 in CSnPCR can be set for the first half and second half 
individually. The first half of area 5 is allocated from H'1400 0000 to H'15FF FFFF, and the 
second half of area 5 is allocated from H'1600 0000 to H'17FF FFFF. The first half of area 6 is 
allocated from H'1800 0000 to H'19FF FFFF, and the second half of area 6 is allocated from 
H'1A00 0000 to H'1BFF FFFF (these addresses are the local bus address). The pulse widths of 
OE 
and 
WE assertion for the first half of area 5 and 6 are set by the IW bits in CSnWCR. 
CSnPCR is initialized to H'7700 0000 by a power-on reset, but it is not initialized by a manual 
reset. 
16
17
18
19
20
21
22
23
24
25
26
27
28
29
31
30
0
0
0
0
0
0
0
0
1
1
1
0
1
1
0
1
PCIW
PCWA
PCWB
SAB
SAA
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
R
R/W
BIt:
Initial value:
R/W:
0
1
2
3
4
5
6
7
8
9
10
11
12
13
15
14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TEHB
TEHA
TEDB
TEDA
R/W
R/W
R/W
R
R/W
R/W
R/W
R
R/W
R/W
R/W
R
R/W
R/W
R
R/W
BIt:
Initial value:
R/W:
 
 
Bit Bit 
Name 
Initial 
Value R/W  Description 
31 
⎯ 0 
Reserved 
This bit is always read as 0. The write value should 
always be 0. 
30 to 28  SAA 
111 
R/W 
Space Property A 
These bits specify the space property of PCMCIA 
connected to the first half of the area. 
000: ATA complement mode 
001: Dynamic I/O bus sizing 
010: 8-bit I/O space 
011: 16-bit I/O space 
100: 8-bit common memory 
101: 16-bit common memory 
110: 8-bit attribute memory 
111: 16-bit attribute memory