Renesas SH7781 用户手册
17. Power-Down Mode
Rev.1.00 Jan. 10, 2008 Page 785 of 1658
REJ09B0261-0100
17.3.1
Sleep Control Register (SLPCR)
SLPCR is a 32-bit readable/writable register that can specify transition to deep sleep mode.
SLPCR can be accessed only in longword.
SLPCR can be accessed only in longword.
This register is initialized by a power-on reset by the
PRESET pin or power-on reset by WDT
overflow, or H-UDI reset.
16
17
18
19
20
21
22
23
24
25
26
27
28
29
31
30
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
BIt:
Initial value:
R/W:
0
1
2
3
4
5
6
7
8
9
10
11
12
13
15
14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSLP
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
R/W
R/W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
BIt:
Initial value:
R/W:
Bit Bit
Name
Initial
Value R/W Description
Value R/W Description
31 to 2
⎯ All
0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
should always be 0.
1
⎯ 0
R/W
Reserved
These bits are always read as 0. The write value
should always be 0.
should always be 0.
0 DSLP 0 R/W
Deep
Sleep
Enables transition to deep sleep mode by the SLEEP
instruction
instruction
0: Transition to sleep mode by the SLEEP instruction
1: Transition to deep sleep mode by the SLEEP
instruction