Renesas 4513 用户手册
4513/4514 Group User’s Manual
APPLICATION
2-5
2.1 I/O pins
(2)
Key-on wakeup control register K0
Register K0 controls the ON/OFF of the key-on wakeup function of ports P0
Register K0 controls the ON/OFF of the key-on wakeup function of ports P0
0
–P0
3
and P1
0
–P1
3
.
Set the contents of this register through register A with the TK0A instruction.
The contents of register K0 is transferred to register A with the TAK0 instruction.
Table 2.1.2 shows the key-on wakeup control register K0.
The contents of register K0 is transferred to register A with the TAK0 instruction.
Table 2.1.2 shows the key-on wakeup control register K0.
Table 2.1.2 Key-on wakeup control register K0
Key-on wakeup control register K0
at reset : 0000
2
at RAM back-up : state retained
R/W
Key-on wakeup not used
Key-on wakeup used
Key-on wakeup not used
Key-on wakeup used
Key-on wakeup not used
Key-on wakeup used
Key-on wakeup not used
Key-on wakeup used
Ports P1
2
, P1
3
key-on wakeup control bit
Ports P1
0
, P1
1
key-on wakeup control bit
Ports P0
2
, P0
3
key-on wakeup control bit
Ports P0
0
, P0
1
key-on wakeup control bit
0
1
0
1
0
1
0
1
K0
3
K0
2
K0
1
K0
0
Note: “R” represents read enabled, and “W” represents write enabled.
(3)
A-D control register Q2
Bits 0 to 2 of register Q2 controls the pin function selection bits.
Set the contents of this register through register A with the TQ2A instruction.
The contents of register Q2 is transferred to register A with the TAQ2 instruction.
Table 2.1.3 shows the A-D control register Q2.
Bits 0 to 2 of register Q2 controls the pin function selection bits.
Set the contents of this register through register A with the TQ2A instruction.
The contents of register Q2 is transferred to register A with the TAQ2 instruction.
Table 2.1.3 shows the A-D control register Q2.
Table 2.1.3 A-D control register Q2
A-D control register Q2
at reset : 0000
2
at RAM back-up : state retained
R/W
A-D conversion mode
Comparator mode
P4
3
, P4
2
(I/O) (Note 4)
A
IN7
, A
IN6
/P4
3
, P4
2
(Output) (Note 4)
P4
1
(I/O) (Note 4)
A
IN5
/P4
1
(Output) (Note 4)
P4
0
(I/O) (Note 4)
A
IN4
/P4
0
(Output) (Note 4)
A-D operation mode control bit
P4
3
/A
IN7
, P4
2
/A
IN6
pin function
selection bit (Note 3)
P4
1
/A
IN5
pin function selection bit
(Note 3)
P4
0
/A
IN4
pin function selection bit
(Note 3)
0
1
0
1
0
1
0
1
Q2
3
Q2
2
Q2
1
Q2
0
Notes 1: “R” represents read enabled, and “W” represents write enabled.
2: Select A
IN4
–A
IN7
with register Q1 after setting register Q2.
3: For the 4513 Group, these bits are not used.
4: For the 4513 Group, only read/write of these bits is enabled.
5: When setting ports, Q2
4: For the 4513 Group, only read/write of these bits is enabled.
5: When setting ports, Q2
3
is not used.