Motorola MC68VZ328 用户手册
9-6
MC68VZ328 User’s Manual
Vector Generation
9.4.2
Interrupt Vectors
The MC68VZ328 provides one interrupt vector for each of the seven user interrupt levels. These interrupt
vectors form the user interrupt vector section of Table 9-1 on page 9-3. The user interrupt vectors can be
located anywhere within the 0x100 to 0x400 address range. The 5 most significant bits of the interrupt
vector number are programmable, but the lower 3 bits reflect the interrupt level being serviced. All
interrupts are maskable by the interrupt controller. If an interrupt is masked, its status can still be accessed
in the interrupt pending register (IPR).
vectors form the user interrupt vector section of Table 9-1 on page 9-3. The user interrupt vectors can be
located anywhere within the 0x100 to 0x400 address range. The 5 most significant bits of the interrupt
vector number are programmable, but the lower 3 bits reflect the interrupt level being serviced. All
interrupts are maskable by the interrupt controller. If an interrupt is masked, its status can still be accessed
in the interrupt pending register (IPR).
9.5
Vector Generation
The interrupt controller provides a vector number to the core. You can program the upper 5 bits of the
interrupt vector register (IVR) to allow the interrupt vector number to point to any address in the exception
vector table. However, many of the vector addresses are assigned to the core’s internal exceptions and
cannot be reused. This leaves only a small range of address space (0x100 to 0x400) to which you can
configure the IVR to locate user interrupt vectors. For example, if you write a value of 0x40 to the IVR, the
interrupt vector base is set to point to 0x100 (0x40<<2), which is the beginning of the user interrupt vectors
shown in Table 9-1 on page 9-3. The coding for the vector numbers is provided in Table 9-2.
interrupt vector register (IVR) to allow the interrupt vector number to point to any address in the exception
vector table. However, many of the vector addresses are assigned to the core’s internal exceptions and
cannot be reused. This leaves only a small range of address space (0x100 to 0x400) to which you can
configure the IVR to locate user interrupt vectors. For example, if you write a value of 0x40 to the IVR, the
interrupt vector base is set to point to 0x100 (0x40<<2), which is the beginning of the user interrupt vectors
shown in Table 9-1 on page 9-3. The coding for the vector numbers is provided in Table 9-2.
Table 9-2. Interrupt Vector Numbers
Interrupt
Vector Number
Level 7
xxxxx111
Level 6
xxxxx110
Level 5
xxxxx101
Level 4
xxxxx100
Level 3
xxxxx011
Level 2
xxxxx010
Level 1
xxxxx001
Note:
xxxxx is replaced by the upper 5 bits of the
interrupt vector register.