Motorola MC68VZ328 用户手册
10-28
MC68VZ328 User’s Manual
Programming Model
10.4.8
Port G Registers
Port G is comprised of the following 8-bit general-purpose I/O registers:
•
Port G direction register (PGDIR)
•
Port G data register (PGDATA)
•
Port G pull-up enable register (PGPUEN)
•
Port G select register (PGSEL)
Each signal in the PGDATA register connects to an external pin. It should be noted that pins 6 and 7 are
not connected to external pins. Port G provides a total of six pins, and each bit is individually configured.
not connected to external pins. Port G provides a total of six pins, and each bit is individually configured.
10.4.8.1
Port G Direction Register
The Port G direction register controls the direction (input or output) of the line associated with the
PGDATA bit position. When the data bit is assigned to a dedicated I/O function by the PGSEL register, the
DIR bits are ignored. The settings for the PGDIR bit positions are shown in Table 10-36.
PGDATA bit position. When the data bit is assigned to a dedicated I/O function by the PGSEL register, the
DIR bits are ignored. The settings for the PGDIR bit positions are shown in Table 10-36.
PGDIR
Port G Direction Register
0x(FF)FFF430
10.4.8.2
Port G Data Register
The settings for the bit positions of the PGDATA register are shown in Table 10-37 on page 10-29.
BIT 7
6
5
4
3
2
1
BIT 0
DIR5
DIR4
DIR3
DIR2
DIR1
DIR0
TYPE
rw
rw
rw
rw
rw
rw
RESET
0
0
0
0
0
0
0
0
0x00
Table 10-36. Port G Direction Register Description
Name Description
Setting
Reserved
Bits
Bits
7–6
Reserved
These bits are reserved and should be set to
0.
0.
DIRx
Bits 5–0
Bits 5–0
Direction—These bits control the direction of
the pins in an 8-bit system. They reset to 0.
the pins in an 8-bit system. They reset to 0.
0 = Input
1 = Output
1 = Output