Motorola MC68VZ328 用户手册

3-2

On reset the base address used in the table is 0xFFFFF000 (or 0xXXFFF000, where XX is “don’t care”). If 
a double-mapped bit is cleared in the system control register, then the base address is 0xFFFFF000 only. 
Unpredictable results occur if you write to any 4K register space not documented in Table 3-1 or Table 3-2 
on page 3-8.

0xFFFFF000

SCR

8

System control register

0x1C

0xFFFFF003

PCR

8

Peripheral control register

0x00

0xFFFFF004

IDR

32

Silicon ID register

0x56000000

0xFFFFF008

IODCR

16

I/O drive control register

0x1FFF

0xFFFFF100

CSGBA

16

Chip-select group A base register

0x0000

0xFFFFF102

CSGBB

16

Chip-select group B base register

0x0000

0xFFFFF104

CSGBC

16

Chip-select group C base register

0x0000

0xFFFFF106

CSGBD

16

Chip-select group D base register

0x0000

0xFFFFF108

CSUGBA

16

Chip-select upper group address 
register

0x0000

0xFFFFF10A

CSCR

16

Chip-select control register

0x0000

0xFFFFF110

CSA

16

Group A chip-select register

0x00B0

0xFFFFF112

CSB

16

Group B chip-select register

0x0000

0xFFFFF114

CSC

16

Group C chip-select register

0x0000

0xFFFFF116

CSD

16

Group D chip-select register

0x0200

0xFFFFF118

EMUCS

16

Emulation chip-select register

0x0060

0xFFFFF200

PLLCR

16

PLL control register

0x24B3

0xFFFFF202

PLLFSR

16

PLL frequency select register

0x0347

0xFFFFF204

RES

—

Reserved

—

—

0xFFFFF207

PCTLR

8

Power control register

0x1F

0xFFFFF300

IVR

8

Interrupt vector register

0x00

0xFFFFF302

ICR

16

Interrupt control register

0x0000

0xFFFFF304

IMR

32

Interrupt mask register

0x00FFFFFF

0xFFFFF308

RES

32

Reserved

—

—

0xFFFFF30C

ISR

32

Interrupt status register

0x00000000