Motorola MVME2300 Series 用户手册

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页码 282
Raven Interrupt Controller
http://www.motorola.com/computer/literature
2-83
2
Raven-Detected Errors Vector/Priority Register
MASK
Mask. Setting this bit disables any further interrupts from 
this source. If the mask bit is cleared while the bit 
associated with this interrupt is set in the IPR, the interrupt 
request will be generated.
ACT
Activity. The activity bit indicates that an interrupt has 
been requested or that it is in-service. The ACT bit is set 
to a 1 when its associated bit in the Interrupt Pending 
register or In-Service register is set.
SENSE
Sense. This bit sets the sense for external interrupts. 
Setting this bit to a 0 enables positive edge sensitive 
interrupts. Setting this bit to a 1 enables active low level 
sensitive interrupts.
PRIOR
Interrupt Priority. Priority 0 is the lowest and 15 is the 
highest. Note that a priority level of 0 will not enable 
interrupts.
VECTOR Interrupt Vector. This vector is returned when the 
Interrupt Acknowledge register is examined upon 
acknowledgment of the interrupt associated with this 
vector.
Offset
$10200
Bit
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0 9 8 7 6 5 4 3 2 1 0
Name
RAVEN DETECTED ERRORS VECTOR/PRIORITY
MA
SK
ACT
SEN
S
E
PRIOR
VECTOR
Operation
R/W
R
R
R
R/W
R
R
R/W
R
R/W
Reset
1
0
$000
0
0
0
0
$0
$00
$00