Motorola MVME2300 Series 用户手册
Programming Model
http://www.motorola.com/computer/literature
3-39
3
tien
When tien is set, the setting of the tpass or the tfail bit
causes the INT_ signal pin to pulse true.
causes the INT_ signal pin to pulse true.
sien
When sien is set, the logging of a single-bit error causes
the INT_ signal pin to pulse true.
the INT_ signal pin to pulse true.
mien
When mien is set, the logging of a non-correctable error
causes the INT_ signal pin to pulse true.
causes the INT_ signal pin to pulse true.
mcken
When mcken is set, the detection of a multiple-bit error
during a PowerPC read or write causes the Falcon to pulse
its machine check interrupt request pin (MCP_) true.
When mcken is cleared, the Falcon does not ever assert its
MCP_ pin.
during a PowerPC read or write causes the Falcon to pulse
its machine check interrupt request pin (MCP_) true.
When mcken is cleared, the Falcon does not ever assert its
MCP_ pin.
The Falcon never asserts its MCP_ pin in response to a
multiple-bit error detected during a scrub cycle.
multiple-bit error detected during a scrub cycle.
!
Caution
The INT_ and MCP_ pins are the only non-polled notification that a
multiple-bit error has occurred. The Falcon pair does not assert TEA as a
result of a multiple bit error. In fact, the Falcon pair does not have a TEA_
signal pin and it assumes that the system does not implement TEA_.
multiple-bit error has occurred. The Falcon pair does not assert TEA as a
result of a multiple bit error. In fact, the Falcon pair does not have a TEA_
signal pin and it assumes that the system does not implement TEA_.
Error Logger Register
The Error Logger and Error Address registers behave the same as the other
registers, in that data written to the upper Falcon is automatically
duplicated in the lower Falcon. They also behave the same as the other
registers, in that status read from the upper Falcon pertains to the upper
Falcon, and status read from the lower Falcon pertains to the lower Falcon.
registers, in that data written to the upper Falcon is automatically
duplicated in the lower Falcon. They also behave the same as the other
registers, in that status read from the upper Falcon pertains to the upper
Falcon, and status read from the lower Falcon pertains to the lower Falcon.
Address
$FEF80030
Bit
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Name
el
o
g
0
0
0
esc
b
b
ese
n
n
emb
t
esb
t
t
ERROR_SYNDROME
0
0
esb
lk0
lk0
esb
lk1
lk1
0
0
0
sco
f
f
SBE_COUNT
Operation
R/
C
C
R
R
R
R
R/
W
W
R
R
READ ONLY
R
R
R
R
R
R
R
R/
C
C
READ/WRITE
Reset
0 P
X
X
X
X P
0 P
L
L
X P
X P
X P
X
X
X
X
X
X
X
0 P
0 P