Motorola MVME2300 Series 用户手册
5-6
Computer Group Literature Center Web Site
Programming Details
5
The assignments of the PCI and ISA interrupts supported by the PIB are as
follows:
follows:
Table 5-3. PIB PCI/ISA Interrupt Assignments
PRI
ISA
IRQ
PCI
IRQ
Co
ntr
o
ntr
o
ller
Edge/
Level
Pola
rity
Interrupt Source
Note
s
1
IRQ0
INT1
Edge
High
Timer 1 / Counter 0
1
2
IRQ1
N/A
N/A
Not used
3-10
IRQ2
Edge
High
Cascade Interrupt from INT2
3
IRQ8_
INT2
Edge
Low
ABORT Switch Interrupt
4
IRQ9
N/A
N/A
Not used
5
IRQ10
PIRQ0_
Level
Low
PCI-Ethernet Interrupt
2,3,4
6
IRQ11
PIRQ1_
Level
Low
Universe Interrupt (LINT0#)
2,3,4
7
IRQ12
N/A
N/A
Not used
8
IRQ13
N/A
N/A
Not used
9
IRQ14
PIRQ2_
N/A
N/A
Not used
10
IRQ15
PIRQ3_
Level
Low
PMC/PCIX Interrupt
2,3,4
11
IRQ3
INT1
N/A
N/A
Not used
12
IRQ4
Edge
High
COM1 (16550)
13
IRQ5
Level
High
LM/SIG Interrupt 0/1
4
14
IRQ6
N/A
N/A
Not used
15
IRQ7
N/A
N/A
Not used