Motorola MVME2300 Series 用户手册

System Block Diagram

http://www.motorola.com/computer/literature

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The MVME2300 series does not provide any look-aside external cache 
option. The Falcon chip set controls the boot Flash and the ECC DRAM. 
The Raven ASIC functions as the 64-bit PCI host bridge and the MPIC 
interrupt controller. PCI devices include: VME, Ethernet, and two PMC 

Serial I/O

One asynchronous debug port via 
RJ45 connector on front panel

One asynchronous debug port via 
DB9 connector on front panel,
also via P2 and transition module

Ethernet I/O

10BaseT/100BaseTX connections 
via RJ45 connector on front panel

10BaseT/100BaseTX connections 
via RJ45 connector on front panel; 
AUI connections via P2 and 
transition module

PCI interface

Two IEEE P1386.1 PCI Mezzanine Card (PMC) slots for one double-
width or two single-width PMCs

Front panel and/or VMEbus P2 I/O on both PMC slots

One 114-pin Mictor connector for optional PMCspan expansion module

SCSA I/O

Not available

Connections from both PMC slots 
to SCSA backplane TDM bus (if 
present in system) via 

shared pins 

on P2

 connector

VMEbus interface

VMEbus system controller functions

VME64 extension

VMEbus-to-local-bus interface (A24/A32, D8/D16/D32/block transfer 
[D8/D16/D32/D64])

Local-bus-to-VMEbus interface (A16/A24/A32, D8/D16/D32)

VMEbus interrupter

VMEbus interrupt handler

Global Control/Status Register (GCSR) for interprocessor 
communications

DMA for fast local memory/VMEbus transfers (A16/A24/A32, 
D16/D32/D64)