Transcend 512MB SDRAM PC100 Unbuffer Non-ECC Memory TS64MLS64V8F2 用户手册

 

 

The TS64MLS64V8F2 is a 64M bit x 64 Synchronous 

Dynamic RAM high-density for PC-100. The 

TS64MLS64V8F2 consists of 16pcs CMOS 32Mx8 bits 

Synchronous DRAMs in TSOP-II 400mil packages and a 

2048 bits serial EEPROM on a 168-pin printed circuit 

board. The TS64MLS64V8F2 is a Dual In-Line Memory 

Module and is intended for mounting into 168-pin edge 

connector sockets. 

Synchronous design allows precise cycle control with 

the use of system clock. I/O transactions are possible on 

every clock cycle. Range of operation frequencies, 

programmable latencies allow the same device to be 

useful for a variety of high bandwidth, high performance 

memory system applications. 

 

•   Performance Range: PC-100. 
•   Conformed to JEDEC Standard Spec. 
•   Burst Mode Operation. 
•   Auto and Self Refresh. 
•   CKE Power Down Mode. 
•   DQM Byte Masking (Read/Write) 
•   Serial Presence Detect (SPD) with serial EEPROM  
•   LVTTL compatible inputs and outputs. 
•   Single 3.3V ± 0.3V power supply. 
•   MRS cycle with address key programs. 

     Latency (Access from column address) 

     Burst Length (1,2,4,8 & Full Page) 

     Data Sequence (Sequential & Interleave) 

•   All inputs are sampled at the positive going edge of 

            the system clock. 

 

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