Intel 82559 用户手册

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Multiple IP address recognition

Filter.  A filter is a set of a signature and segments generated for a specific frame format. Each 

filter defines one frame that causes the controller to wake the system. The Intel Fast Ethernet 
controllers support 3 different filters.

Segment.  A segment defines a continuous sequence of bytes in a frame that should be filtered by 

the controller. Any byte in a frame, which is not included in any segment, is ignored during 

filtering. A segment is defined by 3 parameters:

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Location of first Dword in the segment

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Location of last Dword in the segment

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Byte masks for first and last Dwords

The Intel controllers support a variable number of segments per filter.

Mask.  A mask defines which bytes in each segment should be filtered by the device. Since each 
segment holds a continuous sequence of bytes, the mask information is required only for the first 

and last Dwords of the segment.

Signature.  A special type of CRC is calculated for each filter. There is one 32-bit signature for all 

segments of each filter. For each frame, the controller compares the filter signature with the one 
calculated on all segments and wakes the system if the signatures are equal.

The flexible filtering feature in the device requires an active clock at the CLK input, which can be 
the PCI clock while the system bus is at B0 or B1. An active clock should be provided externally 

while the host bus is in the B2 or B3 states. The controller provides a 25 MHz output clock that can 

be used to feed the clock during these states. External clock switching circuitry is required to 
ensure a smooth transition between the PCI and the 25 MHz clock. For more details refer to the 

device data sheet.

Flexible filtering and frame storing are disabled while the Force TCO pin is asserted. In this case, 
the device wakes the system when it receives a packet that matches one of the fixed packet filters 

or when a link status change event occurs. However, no frames will be stored.

Only the first 124 bytes of each frame may be filtered and stored. The frame length is not limited.

The segment limitations are:

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The maximum total number of segments in all filters is 10.

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The first filter may hold 1 to 4 segments.

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The 2

nd

 filter may hold 0 to 6 segments.

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The 3

rd

 filter may hold 0 to 2 segments.