National Instruments 6024E 用户手册

Contents

6023E/6024E/6025E User Manual

viii

ni.com

Figures

The Relationship Between the Programming Environment,
NI-DAQ, and Your Hardware............................................................... 1-5

PCI-6023E, PCI-6024E, PCI-6025E, and PXI-6025E
Block Diagram ...................................................................................... 3-1

DAQCard-6024E Block Diagram......................................................... 3-2

Dithering ............................................................................................... 3-5

CONVERT* Signal Routing................................................................. 3-8

PCI RTSI Bus Signal Connection......................................................... 3-10

PXI RTSI Bus Signal Connection......................................................... 3-11

I/O Connector Pin Assignment for the 6023E/6024E........................... 4-2

I/O Connector Pin Assignment for the 6025E ...................................... 4-3

Programmable Gain Instrumentation Amplifier (PGIA) ...................... 4-10

Summary of Analog Input Connections ............................................... 4-12

Differential Input Connections for Ground-Referenced Signals .......... 4-14

Differential Input Connections for Nonreferenced Signals .................. 4-15

Single-Ended Input Connections for Nonreferenced or
Floating Signals .................................................................................... 4-18

Single-Ended Input Connections for Ground-Referenced Signals ....... 4-19

Analog Output Connections.................................................................. 4-20

Digital I/O Connections ........................................................................ 4-21

Digital I/O Connections Block Diagram............................................... 4-22

DIO Channel Configured for High DIO Power-up State with
External Load........................................................................................ 4-24

Timing Specifications for Mode 1 Input Transfer ................................ 4-27

Timing Specifications for Mode 1 Output Transfer ............................. 4-28

Timing Specifications for Mode 2 Bidirectional Transfer.................... 4-29

Timing I/O Connections ....................................................................... 4-31

Typical Posttriggered Acquisition ........................................................ 4-32

Typical Pretriggered Acquisition .......................................................... 4-33

SCANCLK Signal Timing .................................................................... 4-33

EXTSTROBE* Signal Timing ............................................................. 4-34

TRIG1 Input Signal Timing.................................................................. 4-34

TRIG1 Output Signal Timing ............................................................... 4-35

TRIG2 Input Signal Timing.................................................................. 4-36

TRIG2 Output Signal Timing ............................................................... 4-36

STARTSCAN Input Signal Timing...................................................... 4-37

STARTSCAN Output Signal Timing ................................................... 4-37

CONVERT* Input Signal Timing ........................................................ 4-38

CONVERT* Output Signal Timing...................................................... 4-39

SISOURCE Signal Timing ................................................................... 4-40