Motorola CPCI-6115 用户手册
J25, SROM Initialization Enable Header
Hardware Preparation and Installation
CPCI-6115 CompactPCI Single Board Computer Installation and Use (6806800A68D)
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2.5.8
J25, SROM Initialization Enable Header
A 3-pin header is used to enable or disable the SROM initialization. A jumper placed between
pins 1 and 2 enables the device initialization via the I
pins 1 and 2 enables the device initialization via the I
2
C SROM. No jumper or a jumper placed
between pins 2 and 3 disables the initialization sequence.
2.5.9
J99, Flash Bank A Programming Enable Header
To protect the contents of Flash Bank A a 2-pin header is used to enable or disable the
programming of Flash Bank A. A jumper across pins 1 and 2 enables writes to array blocks,
programming data, or configuring lock-bits. No jumper installed disables all Flash Bank A
programming.
programming of Flash Bank A. A jumper across pins 1 and 2 enables writes to array blocks,
programming data, or configuring lock-bits. No jumper installed disables all Flash Bank A
programming.
Figure 2-9
Jumper Setting for J25
Figure 2-10 Jumper Setting for J99