Motorola CPCI-6115 用户手册
CPCI-6115 CompactPCI Single Board Computer Installation and Use (6806800A68D)
Controls, LEDs, and Connectors
Flash Bank A Write Protect Header
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3.5.17
Flash Bank A Write Protect Header
A 2-pin 2 mm header is located on the board to enable/disable programming of Flash Bank A
to protect the contents from being corrupted. No jumper installed disables all Flash Bank A
programming by driving the FLASH VPEN pin to a logic low. The jumper must be installed for
erasing array blocks, programming data or configuring lock-bits. The pin assignments for this
header are as follows:
to protect the contents from being corrupted. No jumper installed disables all Flash Bank A
programming by driving the FLASH VPEN pin to a logic low. The jumper must be installed for
erasing array blocks, programming data or configuring lock-bits. The pin assignments for this
header are as follows:
3.5.18
+/-12 V Present Header
A 2-pin 0.1" header is located on the board to inform the CPCI-6115 whether the +/-12 V power
supplies are present on the backplane. If so, then these power supplies are monitored for
inclusion in the HLTY# status. If no jumper is installed, the CPCI-6115 will assume that the +/-
12 V supplies are present. With a jumper installed, the +/-12 V power supplies are not
monitored. The pin assignments for this header are as follows:
supplies are present on the backplane. If so, then these power supplies are monitored for
inclusion in the HLTY# status. If no jumper is installed, the CPCI-6115 will assume that the +/-
12 V supplies are present. With a jumper installed, the +/-12 V power supplies are not
monitored. The pin assignments for this header are as follows:
Table 3-19 Bank A Write Protect Header Pin Assignments, J99
Pin
Signal
1
+3.3 V
2
VPEN
Table 3-20 +/-12 V Present Header Pin Assignments, J15
Pin
Signal
1
PWR12V_EN
2
GND