Motorola MVME2400 用户手册
4-6
Computer Group Literature Center Web Site
Programming the MVME240x
4
.
Interrupt Handling
The Hawk ASIC, which controls the PHB (PCI Host Bridge) and the
MPU/local bus interface functions on the MVME240x, performs interrupt
handling as well. Sources of interrupts may be any of the following:
MPU/local bus interface functions on the MVME240x, performs interrupt
handling as well. Sources of interrupts may be any of the following:
❏
The Hawk ASIC itself (timer interrupts, transfer error interrupts, or
memory error interrupts)
memory error interrupts)
❏
The processor (processor self-interrupts)
❏
The PCI bus (interrupts from PCI devices)
❏
The ISA bus (interrupts from ISA devices)
Figure 4-2 illustrates interrupt architecture on the MVME240x. For details
on interrupt handling, refer to the MVME2400-Series VME Processor
Module Programmer’s Reference Guide.
on interrupt handling, refer to the MVME2400-Series VME Processor
Module Programmer’s Reference Guide.
Table 4-2. PCI Arbitration Assignments
PCI Bus Request
PCI Master(s)
PIB (Internal)
PIB
CPU
Hawk ASIC
Request 0
PMC Slot 2
Request 1
PMC Slot 1
Request 2
PCI Expansion Slot
Request 3
Ethernet
Request 4
Universe ASIC (VMEbus)