Intel Intel Core2 Extreme QX6850 HH80562XJ0808M 数据表

Datasheet

3

Introduction ..............................................................................................................9
1.1

Terminology .......................................................................................................9
1.1.1

Processor Packaging Terminology ............................................................. 10

Electrical Specifications ........................................................................................... 13
2.1

Power and Ground Lands.................................................................................... 13

Voltage Identification ......................................................................................... 14

Reserved, Unused, and TESTHI Signals ................................................................ 16

DC Voltage and Current Specification ........................................................ 18

FSB Signal Groups.................................................................................. 22

CMOS and Open Drain Signals ................................................................. 23

Processor DC Specifications ..................................................................... 23
2.6.3.1

GTL+ Front Side Bus Specifications ............................................. 25

Front Side Bus Clock (BCLK[1:0]) and Processor Clocking ............................ 26

BCLK[1:0] Specifications ......................................................................... 28

Package Mechanical Specifications .......................................................................... 31
3.1

Land Listing and Signal Descriptions ....................................................................... 39
4.1

Alphabetical Signals Reference ............................................................................ 62

Thermal Specifications and Design Considerations .................................................. 71
5.1