Renesas SH7264 用户手册
Section 18 Serial Sound Interface
R01UH0134EJ0400 Rev. 4.00
Page 927 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Transmitting and Receiving in the Order of Padding Bits and Serial Data; with Delay
SSISCK
SSIWS
SSIDATA
0
0
0
TD28
0
0
1st Channel
2nd Channel
TD30 TD29
TD31 TD30 TD29 TD28
TD31 TD30 TD29 TD28
As basic sample format configuration except SDTA = 1
Figure 18.14 Transmitting and Receiving in the Order of Padding Bits and Serial Data;
with Delay
Transmitting and Receiving in the Order of Padding Bits and Serial Data; without Delay
As basic sample format configuration except SDTA = 1 and DEL = 1
0
0
0
TD28
0
0
TD29
0
TD31 TD30 TD29 TD28
TD31 TD30 TD29 TD28
SSISCK
SSIWS
SSIDATA
1st Channel
2nd Channel
Figure 18.15 Transmitting and Receiving in the Order of Padding Bits and Serial Data;
without Delay
Transmitting and Receiving in the Order of Serial Data and Padding Bits; without Delay
As basic sample format configuration except DEL = 1
0
0
0
0
0
0
TD31 TD30
TD31 TD30 TD29 TD28
TD31 TD30 TD29 TD28
SSISCK
SSIWS
SSIDATA
1st Channel
2nd Channel
Figure 18.16 Transmitting and Receiving in the Order of Serial Data and Padding Bits;
without Delay