Renesas R5S72640 用户手册
Section 27 Video Display Controller 3
R01UH0134EJ0400 Rev. 4.00
Page 1549 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
27.3
Input/Output Pins
Table 27.2 Pin Configuration
Symbol I/O
Pin
Name
Function
DV_CLK
Input
Video input clock
BT.601 or BT.656 clock input pin.
DV_VSYNC
Input
VSYNC input
BT.601 VSYNC signal input pin.
DV_HSYNC
Input
HSYNC input
BT.601 HSYNC signal input pin.
DV_DATA7 to
DV_DATA0
DV_DATA0
Input
BT.601 or BT.656 input
BT.601 or BT.656 data signal input pins.
LCD CLK
Output
Panel clock
Panel clock output pin.
LCD_EXTCLK
Input
Panel clock source
Panel clock source input pin.
LCD_VSYNC Output
Panel
VSYNC
output Vertical sync signal output pin for the
panel.
LCD_HSYNC Output Panel
HSYNC
output Horizontal sync signal output pin for the
panel.
LCD_DE
Output
Panel data enable output Data enable signal or data start position
pulse signal output pin for the panel.
LCD_DATA15 to
LCD_DATA0
LCD_DATA0
Output
Panel data output
Data output pins for the panel.
MSB LSB
MSB LSB
[15:11]:
Red [4:0]
[10:5]:
Green [5:0]
[4:0]:
Blue [4:0]
LCD_M_DISP
Output
Panel control signal
Alternating signal for the panel.