Renesas R5S72624 用户手册
Section 34 User Debugging Interface
Page 1822 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
Bit Bit
Name
Initial
Value R/W
Value R/W
Description
7 to 2
All
1
R
Reserved
These bits are always read as 1.
1
0 R
Reserved
These bits are always read as 0.
0
1 R
Reserved
These bits are always read as 1.
Table 34.3 Emulation Commands
Bits 15 to 8
Description
TI7 TI6 TI5 TI4 TI3 TI2 TI1 TI0
0 1 1 0
User debugging interface reset negation
0 1 1 1
User debugging interface reset assertion
1 0 0 1 1 1 0 0 TDO
transition
timing
switch
1 0 1 1
User debugging interface interrupt
1 1 1 1
BYPASS
Other than the above
Reserved