Renesas R5S72621 用户手册

 
Section 24   A/D Converter 

Page 1260 of 2108 

 

R01UH0134EJ0400  Rev. 4.00 

 

 Sep 

24, 

2014 

SH7262 Group, SH7264 Group

Figure 24.1 shows a block diagram of the A/D converter. 

10-bit

D/A

Bus interface

Module data bus

Analo

g

 

multiplexer

Control circuit

Successive-

 approximation

 re

g

ister 

+

–

Comparator

Sample-and-hold circuit

ADI
interrupt
signal

AV

SS 

  AN4

AN5

AN6

AN7

AN0*

AN1*

AN2*

AN3*

ADCSR

AV

CC

AVref

ADCSR:
ADDRA:
ADDRB:
ADDRC:
ADDRD:

ADDRE:
ADDRF:
ADDRG:
ADDRH:

A/D control/status register
A/D data register A
A/D data register B
A/D data register C
A/D data register D

A/D data register E
A/D data register F
A/D data register G
A/D data register H

Peripheral bus

ADTRG, 

conversion start  
trigger from 

multi-function timer

pulse unit 2

ADDRE

ADDRF

ADDRG

ADDRH

ADDRA

ADDRB

ADDRC

ADDRD

[Legend]

A/D converter

Note: 

* Only AN0 to AN3 can be used in the SH7262 Group.