Kingston Technology 2GB DDR3 240-Pin Long-DIMM Kit KHX1800C8D3K2/2GN 数据表
产品代码
KHX1800C8D3K2/2GN
Memory Module Specification
Document No. 4805380-001.A00
11/05/09
KHX1800C8D3K2/2GN
2GB (1GB 128M x 64-Bit x 2 pcs.) DDR3-1800MHz
CL8 240-Pin DIMM Kit
Page 1
DESCRIPTION:
Kingston's KHX1800C8D3K2/2GN is a kit of two 128M x 64-bit 1GB (1024MB) DDR3-1800MHz CL8 SDRAM
(Synchronous DRAM) "NVIDIA SLI-Ready" memory modules, based on eight 128M x 8-bit DDR3 FBGA components
per module. Total kit capacity is 2GB. Each module kit has been tested to run at DDR3-1800MHz at a low latency timing
of 8-8-8-24 at 1.9V. The SPDs are programmed to JEDEC standard latency DDR3-1066MHz timing of 7-7-7 at 1.5V.
Each 240-pin DIMM uses gold contact fingers and requires +1.5V. The JEDEC standard electrical and mechanical
specifications are as follows:
(Synchronous DRAM) "NVIDIA SLI-Ready" memory modules, based on eight 128M x 8-bit DDR3 FBGA components
per module. Total kit capacity is 2GB. Each module kit has been tested to run at DDR3-1800MHz at a low latency timing
of 8-8-8-24 at 1.9V. The SPDs are programmed to JEDEC standard latency DDR3-1066MHz timing of 7-7-7 at 1.5V.
Each 240-pin DIMM uses gold contact fingers and requires +1.5V. The JEDEC standard electrical and mechanical
specifications are as follows:
FEATURES:
JEDEC standard 1.5V ± 0.075V Power Supply
VDDQ = 1.5V ± 0.075V
533MHz fCK for 1066Mb/sec/pin
8 independent internal bank
Programmable CAS Latency: 6,7,8,9
Posted CAS
Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
Programmable CAS Write Latency(CWL) = 6(DDR3-1066)
8-bit pre-fetch
Burst Length: 8 (Interleave without any limit, sequential with
starting address “000” only), 4 with tCCD = 4 which does not
allow seamless read or write [either on the fly using A12 or MRS]
starting address “000” only), 4 with tCCD = 4 which does not
allow seamless read or write [either on the fly using A12 or MRS]
Bi-directional Differential Data Strobe
Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm ± 1%)
On Die Termination using ODT pin
Average Refresh Period 7.8us at lower then TCASE 85°C, 3.9us at 85°C < TCASE . 95°C
Asynchronous Reset
PCB : Height 1.180” (30.00mm), single sided component
PERFORMANCE:
CL(IDD)
7 cycles
Row Cycle Time (tRCmin)
50.63ns (min.)
Refresh to Active/Refresh Command Time (tRFCmin)
110ns
Row Active Time (tRASmin)
37.5ns (min.)
Power
1.020 W (operating per module)
UL Rating
94 V - 0
Operating Temperature
0
o
C to 85
o
C
Storage Temperature
-55
o
C to +100
o
C
T E C H N O L O G Y
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N
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Y