Cisco Cisco ONS 15454 SONET Multiservice Provisioning Platform (MSPP) 故障排查指南
The information in this document was created from the devices in a specific lab environment. All of the
devices used in this document started with a cleared (default) configuration. If your network is live, make sure
that you understand the potential impact of any command.
devices used in this document started with a cleared (default) configuration. If your network is live, make sure
that you understand the potential impact of any command.
Conventions
Refer to Cisco Technical Tips Conventions for more information on document conventions.
Background Information
The product contains:
The American National Standards Institute/Synchronous Optical NETwork (ANSI/SONET)
provisioning platform
provisioning platform
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The European Telecommunication Standards Institute/International Telecommunications
Union/Synchronous Digital Hierarchy (ETSI/ITU/SDH) provisioning platform
Union/Synchronous Digital Hierarchy (ETSI/ITU/SDH) provisioning platform
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The transport platform, Dense Wavelength Division Multiplexing (DWDM)
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The timing information in this document applies to the two provisioning platforms. The transport platform
uses through timing. In through timing, the received east signal times the transmitted west signal, and
the received west signal times the transmitted east signal.
uses through timing. In through timing, the received east signal times the transmitted west signal, and
the received west signal times the transmitted east signal.
Timing Architecture
The Timing, Communications and Control (TCC) cards and the cross connect (XC) cards control the timing
function on the ONS 15454 based on industry standards for SONET/SDH equipment. Use redundant TCC and
XC cards to provide fault tolerant common system hardware.
function on the ONS 15454 based on industry standards for SONET/SDH equipment. Use redundant TCC and
XC cards to provide fault tolerant common system hardware.
Note: This document uses TCC generically to refer to all variations of the TCC card, and XC generically to
refer to all variations of the XC card.
refer to all variations of the XC card.
The ANSI chassis contains two Building Integrated Timing Supply (BITS) In ports. Both ports terminate in
the Auxiliary Interface Protection (AIP). The termination in the AIP allows both the active and standby TCC
cards to monitor the BITS, and ensures proper termination of BITS even if the backplane is damaged due to a
power surge. For the ETSI platform, BITS interfaces are located at the Front Mount Electrical Connection
(FMEC) panel.
the Auxiliary Interface Protection (AIP). The termination in the AIP allows both the active and standby TCC
cards to monitor the BITS, and ensures proper termination of BITS even if the backplane is damaged due to a
power surge. For the ETSI platform, BITS interfaces are located at the Front Mount Electrical Connection
(FMEC) panel.
All synchronous interfaces (optical ports) derive the transmit timing from the system timing reference that
TCC card manages. The XC cards provide transmit timing to each port. TCC performs these synchronization
functions:
TCC card manages. The XC cards provide transmit timing to each port. TCC performs these synchronization
functions:
To monitor, qualify and select reference.
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To filter and lock to the active reference.
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To manage the distribution of the system clock.
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To terminate two BITS inputs.
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To generate two BITS outputs.
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To process and generate synchronization status messaging (SSM).
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To switch reference for maintenance.
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To generate synchronization alarm reports.
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