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AT80614005940AA
Intel
®
Xeon
®
Processor 5600 Series Datasheet Volume 1
17
Electrical Specifications
2
Electrical Specifications
2.1
Processor Signaling
The Intel Xeon processor 5600 series include 1366 lands, which utilize various signaling
technologies. Signals are grouped by electrical characteristics and buffer type into
various signal groups. These include Intel QuickPath Interconnect, DDR3 (Reference
technologies. Signals are grouped by electrical characteristics and buffer type into
various signal groups. These include Intel QuickPath Interconnect, DDR3 (Reference
Clock, Command, Control, and Data), Platform Environmental Control Interface (PECI),
Processor Sideband, System Reference Clock, Test Access Port (TAP), and Power/Other
signals. Refer to
Processor Sideband, System Reference Clock, Test Access Port (TAP), and Power/Other
signals. Refer to
for details.
2.1.1
Intel
®
QuickPath Interconnect
The Intel Xeon processor 5600 series provide two Intel
®
QuickPath Interconnect ports
for high speed serial transfer between other enabled components. Each port consists of
two uni-directional links (for transmit and receive). A differential signaling scheme is
utilized, which consists of opposite-polarity (D_P, D_N) signal pairs.
two uni-directional links (for transmit and receive). A differential signaling scheme is
utilized, which consists of opposite-polarity (D_P, D_N) signal pairs.
On-die termination (ODT) is included on the processor silicon and terminated to V
SS
.
illustrates the active ODT.
2.1.2
DDR3 Signal Groups
The memory interface utilizes DDR3 technology, which consists of numerous signal
groups. These include: Reference Clocks, Command Signals, Control Signals, and Data
Signals. Each group consists of numerous signals, which may utilize various signaling
technologies. Please refer to
groups. These include: Reference Clocks, Command Signals, Control Signals, and Data
Signals. Each group consists of numerous signals, which may utilize various signaling
technologies. Please refer to
for further details.
2.1.3
Platform Environmental Control Interface (PECI)
PECI is an Intel proprietary interface that provides a communication channel between
Intel processors and chipset components to external thermal monitoring devices. The
processor contains a Digital Thermal Sensor (DTS) that reports a relative die
temperature as an offset from Thermal Control Circuit (TCC) activation temperature.
Temperature sensors located throughout the die are implemented as analog-to-digital
converters calibrated at the factory. PECI provides an interface for external devices to
read processor temperature, perform processor manageability functions, and manage
processor interface tuning and diagnostics. Please refer to
Intel processors and chipset components to external thermal monitoring devices. The
processor contains a Digital Thermal Sensor (DTS) that reports a relative die
temperature as an offset from Thermal Control Circuit (TCC) activation temperature.
Temperature sensors located throughout the die are implemented as analog-to-digital
converters calibrated at the factory. PECI provides an interface for external devices to
read processor temperature, perform processor manageability functions, and manage
processor interface tuning and diagnostics. Please refer to
specific implementation details for PECI.
Figure 2-1. Active ODT for a Differential Link Example
T
X
R
X
R
TT
R
TT
R
TT
R
TT
Signal
Signal