Intel D425 AU80610006252AA 用户手册
产品代码
AU80610006252AA
Processor Configuration Registers
Datasheet
153
1.11.2
Data - MMIO Data Register
B/D/F/Type: 0/2/0/PCI
IO
Address Offset:
4-7h
Default Value:
00000000h
Access: RW;
Size: 32
bits
MMIO_DATA: A 32 bit IO write to this port is re-directed to the MMIO register/GTT
location pointed to by the MMIO-index register. A 32 bit IO read to this port is re-
location pointed to by the MMIO-index register. A 32 bit IO read to this port is re-
directed to the MMIO register address pointed to by the MMIO-index register
regardless of the target selection in MMIO_INDEX(1:0). 8 or 16 bit IO writes are
completed by the CPU UNCORE and may have un-intended side effects, hence must
completed by the CPU UNCORE and may have un-intended side effects, hence must
not be used to access the data port. 8 or 16 bit IO reads are completed normally.
Note that if the target field in MMIO Index selects "GTT", reads to MMIO data return is
undefined.
Bit Access Default
Value
Description
31:0 RW 00000000h
MMIO Data Window (DATA):
§