ASUS CUBX-L 用户手册
ASUS CUBX-L\CUBX-E User’s Manual
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4. BIOS SETUP
4. BIOS SETUP
Chip Configuration
SDRAM Configuration [By SPD]
This sets the optimal timings for items 2–5, depending on the memory mod-
ules that you are using. The default setting is [By SPD], which configures
items 2–5 by reading the contents in the SPD (Serial Presence Detect) de-
vice. The EEPROM on the memory module stores critical parameter infor-
mation about the module, such as memory type, size, speed, voltage inter-
face, and module banks. Configuration options: [User Define] [7ns
(143MHz)] [8ns (125MHz)] [By SPD]
ules that you are using. The default setting is [By SPD], which configures
items 2–5 by reading the contents in the SPD (Serial Presence Detect) de-
vice. The EEPROM on the memory module stores critical parameter infor-
mation about the module, such as memory type, size, speed, voltage inter-
face, and module banks. Configuration options: [User Define] [7ns
(143MHz)] [8ns (125MHz)] [By SPD]
SDRAM CAS Latency
This controls the latency between the SDRAM read command and the time
that the data actually becomes available. NOTE: To make changes to this
field, the SDRAM Configuration field must be set to [User Define].
that the data actually becomes available. NOTE: To make changes to this
field, the SDRAM Configuration field must be set to [User Define].
SDRAM RAS to CAS Delay
This controls the latency between the SDRAM active command and the
read/write command. NOTE: To make changes to this field, the SDRAM
Configuration field must be set to [User Define].
read/write command. NOTE: To make changes to this field, the SDRAM
Configuration field must be set to [User Define].
SDRAM RAS Precharge Time
This controls the idle clocks after issuing a precharge command to the
SDRAM. NOTE: To make changes to this field, the SDRAM Configura-
tion field must be set to [User Define].
SDRAM. NOTE: To make changes to this field, the SDRAM Configura-
tion field must be set to [User Define].
DRAM Idle Timer
This controls the amount of time in HCLKs that the DRAM controller waits
to close a DRAM page after the CPU becomes idle. Leave on default set-
ting. NOTE: To make changes to this field, the SDRAM Configuration
field must be set to [User Define].
to close a DRAM page after the CPU becomes idle. Leave on default set-
ting. NOTE: To make changes to this field, the SDRAM Configuration
field must be set to [User Define].
4.4.1 Chip Configuration
(Scroll down to see more items as shown.)