National Instruments SCXI -1125 用户手册

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Chapter 2    Connecting Signals
© National Instruments Corporation
2-7
Temperature Sensor Connection
Pin C4 on the front signal connector is used to connect to a terminal block 
temperature sensor. The temperature sensor channel is not isolated and is 
referenced to the chassis ground. The connection is overvoltage protected 
to ±25 VDC with power on and ±15 VDC with power off.
Rear Signal Connector
The rear signal connector is a 50-pin male ribbon cable connector used for 
analog signal connectivity and communication between the
 
SCXI-1125 and the connected DAQ device. The rear signal connector 
allows the DAQ device to access all eight differential analog output signals 
from the SCXI-1125. The positive terminal of each analog output is 
 
CH + and the negative terminal CH –. Grounding signals, AI GND 
and OUT REF, provide reference signals needed in the various analog 
referencing modes on the E/M Series DAQ device. In multiplexed mode, 
the CH 0 signal pair is used for sending all eight channels of the 
SCXI-1125, and other analog signals from other modules, to the connected 
E/M Series DAQ device. If the module is directly connected to the E/M 
Series DAQ device, the other analog channels of the E/M Series DAQ 
device are still unavailable for general-purpose analog input because they 
are still connected to the amplifier outputs of the SCXI-1125 in multiplexed 
mode.
The communication signals between the DAQ device and the SCXI system 
are SER DAT IN, SER DAT OUT, DAQ D*/A, SLOT 0 SEL*, SER CLK, 
and AI HOLD COMP, AI HOLD. The digital ground, D GND on pins 24 
and 33, provides a separate ground reference for the communication 
signals. SER DAT IN, SER DAT OUT, DAQ D*/A, SLOT 0 SEL*, and 
SER CLK are the communication lines for programming the SCXI-1125. 
The AI HOLD COMP, AI HOLD and SYNC signals are the signals 
necessary for multiplexed mode scanning. If the E/M Series DAQ device is 
connected to the SCXI-1125, these digital lines are unavailable for 
general-purpose digital I/O. The rear signal pin assignments are shown in 
Table 2-2.