National Instruments pci-6110e-6111e 用户手册

Table of Contents

viii

 National Instruments Corporation

Figure 3-10. Low-Hysteresis Analog Triggering Mode ............................................ 3-9
Figure 3-11. CONVERT* Signal Routing ................................................................. 3-11
Figure 3-12. RTSI Bus Signal Connection ................................................................ 3-13

Figure 4-10. SCANCLK Signal Timing .................................................................... 4-18
Figure 4-11. EXTSTROBE* Signal Timing .............................................................. 4-19
Figure 4-12. TRIG1 Input Signal Timing .................................................................. 4-20
Figure 4-13. TRIG1 Output Signal Timing................................................................ 4-20
Figure 4-14. TRIG2 Input Signal Timing .................................................................. 4-21
Figure 4-15. TRIG2 Output Signal Timing................................................................ 4-21
Figure 4-16. STARTSCAN Input Signal Timing ...................................................... 4-22
Figure 4-17. STARTSCAN Output Signal Timing.................................................... 4-23
Figure 4-18. CONVERT* Input Signal Timing......................................................... 4-24
Figure 4-19. CONVERT* Output Signal Timing ...................................................... 4-24
Figure 4-20. SISOURCE Signal Timing.................................................................... 4-26
Figure 4-21. WFTRIG Input Signal Timing .............................................................. 4-27
Figure 4-22. WFTRIG Output Signal Timing............................................................ 4-27
Figure 4-23. UPDATE* Input Signal Timing............................................................ 4-28
Figure 4-24. UPDATE* Output Signal Timing ......................................................... 4-28
Figure 4-25. UISOURCE Signal Timing ................................................................... 4-29
Figure 4-26. GPCTR0_SOURCE Signal Timing ...................................................... 4-30

PCI_E.book  Page viii  Thursday, June 25, 1998  12:55 PM