NEC PD78078 用户手册

The divider generates various clocks by dividing the main system clock oscillator output (f

XX

).

If it is not necessary to use subsystem clocks for low power consumption operations and clock operations,

connect the XT1 and XT2 pins as follows.

XT1 :  Connect to V

DD

XT2 :  Open

In this state, however, some current may leak via the internal feedback resistor of the subsystem clock oscillator

when the main system clock stops.  To minimize leakage current, set bit 6 (FRC) of the processor clock control register

(PCC) so that the above internal feedback resistor is not used.  In this case also, connect the XT1 and XT2 pins as

described above.