NEC PD78078 用户手册

The A/D converter operates on the main system clock.  Therefore, its operation stops in STOP mode or in

HALT mode with the subsystem clock.  As a current still flows in the AV

REF0

 pin at this time, this current must

be cut in order to minimize the overall system power dissipation.  In Figure 15-9, the power dissipation can

be reduced by outputting a low-level signal to the output port in standby mode.  However, there is no precision

to the actual AV

REF0

 voltage, and therefore the conversion values themselves lack precision and can only

be used for relative comparison.

Series Resistor String

V

DD

AV

REF0

AV

REF0

AV

SS

Output Port

.

 .

µ

PD78078, 78078Y

= V

DD