Nxp Semiconductors ISP1562 用户手册

下载
页码 18
 
 
NXP Semiconductors 
AN10050
 
Designing a Hi-Speed USB host PCI adapter using ISP1562/63
AN10050_4 
© NXP B.V.  2007. All rights reserved.
Application note 
Rev. 04 — 1 November 2007 
6 of 18
are defined on pins 96 (SCL) and 97 (SDA) of the ISP1562, and pins 122 (SCL) and 123 
(SDA) of the ISP1563, respectively. When not in use, these signals must be connected to 
ground using a pull-down resistor, typically 10 k
Ω. 
3.5  Legacy support: applies only to the ISP1563 
Legacy signals, IRQ1, IRQ12, A20OUT, KBIRQ1, MUIRQ12 and SMI#, are not normally 
used on a PCI add-on card design. In this case, the MUIRQ12 and KBIRQ1 input signals 
must be connected to GND. The other signals that are mentioned in this category (that 
are outputs) can be left open. 
Details on legacy signals and a block diagram showing correct connection of these 
signals in the case of onboard design can be found in ISP1563 Eval Board User Manual 
(UM10066). 
3.6 Overcurrent 
protection 
The ISP1562/3 implements the digital overcurrent protection scheme. 
The recommended solution to implement an external overcurrent protection is a standard 
power switch with integrated overcurrent detection, such as: 
•  LM3526 and MIC2526 (2 ports), or 
•  LM3544 (4 ports). 
The overcurrent protection logic of the ISP1562/3 uses the following two pins for each 
USB port: 
•  PWEn_N: It is used to enable or disable the respective external port power switch. 
For example, MIC2526 and LM3526. 
•  OCn_N: It is an input on which a fault condition on the respective USB port is 
signaled to the ISP1562/3 by the external port power-switching device. 
The fault condition that is usually signaled by an external power-switching device can be 
an overcurrent or a thermal shutdown. The port power-switching integrated devices 
commonly implement a delay of 1 ms to 3 ms to prevent false OC_N reporting because 
of inrush currents, when plugging a USB device. 
Once a fault condition is received, it will be detected by the operating system and the 
respective device driver will disable the port power switch by programming the Port 
Power (PP) bit in the PORTSC register. This device driver is the OHCI driver in the case 
of an Original USB device to create the fault condition, or the EHCI driver in the case of a 
Hi-Speed USB device to create the overcurrent condition. This is according to the USB 
port allocation at the moment when the OC# signal was asserted. 
A possible alternative is to use a resettable fuse on each port. This has the advantage of 
simplicity. It, however, does not inform the operating system of the fault condition and, 
therefore, no message is generated to inform the user. The resettable fuse will continue 
to protect the port by switching ‘on or off’ as long as the overcurrent condition persists. 
A possible enhancement of this scheme is connecting V
BUS
 to the OCn_N input of the 
ISP1562/3 to detect the OCn_N condition, the first time V
BUS
 is cut-off a LOW level will 
appear on the OCn_N pin. 
Using only an external PMOS transistor for overcurrent protection is not possible 
because the ISP1562/3 does not implement the analog overcurrent protection (not 
measuring the current through the transistor).