Intel E5645 BX80614E5645 用户手册
产品代码
BX80614E5645
Intel
®
Xeon
®
Processor 5600 Series Datasheet Volume 1
5
Figures
VCC Static and Transient Tolerance Loadlines1,2,3,4.............................................. 35
2-10 VTT Static and Transient Tolerance Loadlines ........................................................ 42
2-11 Intel® QuickPath Interconnect Electrical Test Setup for Validating
2-11 Intel® QuickPath Interconnect Electrical Test Setup for Validating
Standalone TX Voltage and Timing Parameters...................................................... 57
2-13 Distribution Profile of Common Mode Noise for Either Tx or Rx................................. 58
2-14 Distribution Profile of UI-UI Jitter and Accumulated Jitter ........................................ 58
2-15 Eye Mask at the End of Tx + Channel................................................................... 59
2-16 Differential Clock Crosspoint Specification............................................................. 59
2-17 Differential Clock Measurement Points for Duty Cycle and Period ............................. 60
2-18 Differential Clock Measurement Points for Rise and Fall time ................................... 60
2-19 Single-Ended Clock Measurement Points for Absolute Cross Point and Swing ............. 60
2-20 Single-Ended Clock Measurement Points for Delta Cross Point ................................. 61
2-21 Differential Clock Measurement Point for Ringback ................................................. 61
2-22 DDR3 Command / Control and Clock Timing Waveform .......................................... 61
2-23 DDR3 Clock to Output Timing Waveform .............................................................. 62
2-24 DDR3 Clock to DQS Skew Timing Waveform ......................................................... 62
2-25 TAP Valid Delay Timing Waveform ....................................................................... 63
2-26 Test Reset (TRST#), Asynch GTL Input, and PROCHOT# Timing Waveform ............... 63
2-27 THERMTRIP# Power Down Sequence ................................................................... 63
2-28 Voltage Sequence Timing Requirements ............................................................... 64
2-29 VID Step Times and Vcc Waveforms .................................................................... 65
3-1
2-14 Distribution Profile of UI-UI Jitter and Accumulated Jitter ........................................ 58
2-15 Eye Mask at the End of Tx + Channel................................................................... 59
2-16 Differential Clock Crosspoint Specification............................................................. 59
2-17 Differential Clock Measurement Points for Duty Cycle and Period ............................. 60
2-18 Differential Clock Measurement Points for Rise and Fall time ................................... 60
2-19 Single-Ended Clock Measurement Points for Absolute Cross Point and Swing ............. 60
2-20 Single-Ended Clock Measurement Points for Delta Cross Point ................................. 61
2-21 Differential Clock Measurement Point for Ringback ................................................. 61
2-22 DDR3 Command / Control and Clock Timing Waveform .......................................... 61
2-23 DDR3 Clock to Output Timing Waveform .............................................................. 62
2-24 DDR3 Clock to DQS Skew Timing Waveform ......................................................... 62
2-25 TAP Valid Delay Timing Waveform ....................................................................... 63
2-26 Test Reset (TRST#), Asynch GTL Input, and PROCHOT# Timing Waveform ............... 63
2-27 THERMTRIP# Power Down Sequence ................................................................... 63
2-28 Voltage Sequence Timing Requirements ............................................................... 64
2-29 VID Step Times and Vcc Waveforms .................................................................... 65
3-1
7-10 LV-40W Processor Dual Thermal Profile .............................................................. 129
7-11 Case Temperature (TCASE) Measurement Location .............................................. 130
7-12 Frequency and Voltage Ordering........................................................................ 132
7-13 Ping() ............................................................................................................ 136
7-14 Ping() Example ............................................................................................... 136
7-11 Case Temperature (TCASE) Measurement Location .............................................. 130
7-12 Frequency and Voltage Ordering........................................................................ 132
7-13 Ping() ............................................................................................................ 136
7-14 Ping() Example ............................................................................................... 136