Quectel Wireless Solutions Company Limited 201807EG95NA 用户手册

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LTE  Module  Series 
                                                                                                  EG95  Hardware  Design
 
 
EG95_Hardware_Design                                                                                                                              34 / 81 
 
 
 
The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or button 
can be used to control the RESET_N. 
Reset pulse
RESET_N
4.7K
47K
150ms~460ms
 
Figure 14: Reference Circuit of RESET_N by Using Driving Circuit 
 
RESET_N
S2
Close to S2
TVS
 
Figure 15: Reference Circuit of RESET_N by Using Button 
 
The reset scenario is illustrated in the following figure. 
V
IL
  ≤ 0.5V
V
IH
  ≥ 1.3V
VBAT
≥ 150ms
Resetting
Module 
Status
Running
RESET_N
Restart
≤ 460ms
 
Figure 16: Timing of Resetting Module